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HD64F2168 Datasheet, PDF (394/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer
RxD0/
RxD2
TxD0/
TxD2
SSE0I/
SSE2I
SCK0/
SCK2
Module data bus
RDR
RSR
Parity check
TDR
TSR
SCMR
SSR
SCR
SMR
SEMR
BRR
Baud rate
generator
Transmission/
reception control
Parity generation
Clock
C/A
CKE1
SSE
External clock
Average transfer
rate generator
φ
φ/4
φ/16
φ/64
TEI
TXI
RXI
ERI
[Legend]
RSR:
RDR:
TSR:
TDR:
SMR:
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register
SCR:
SSR:
SCMR:
BRR:
SEMR:
Serial control register
Serial status register
Smart card mode register
Bit rate register
Serial enhanced mode register
Figure 14.2 Block Diagram of SCI_0 and SCI_2
Rev. 3.00, 03/04, page 354 of 830