HD64F2168 Datasheet, PDF (311/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

PCSR
PWCKX0
PWCKX1
CB A
Reso-
lution
T
CKS _(µs)
Base
CFS Cycle
Conver-
sion
Cycle
TL/TH
(OS = 0/OS = 1)
Fixed DADR Bits
Accuracy
(Bits)
Bit Data
Conversion
Cycle (ms)*
0 1 1 1 7.76
0 496.48 127.10 Always low/high output
14
(µs)
(ms)
/2.0kHz
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10
127.10
0 0 31.78
0 0 0 0 7.94
1 1985.94 127.10 Always low/high output
14
(φ/256)
(µs)
(ms)
/0.5kHz
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10
1 0 0 1 31.03 0 1.99
508.40 Always low/high output
14
(ms)
(ms)
/503.5Hz
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10
127.10
0 0 31.78
0 0 0 0 7.94
508.40
0 0 127.10
0 0 0 0 31.78
1 7.94
508.40 Always low/high output
14
(φ/1024)
(ms)
(ms)
/125.9Hz
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10
508.40
0 0 127.10
0 0 0 0 31.78
10 1 1
124.12 0
7.94
2.03
(ms)
(s)
/125.9Hz
1
(φ/4096)
31.78 2.03
(ms)
(s)
/31.5Hz
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10
Always low/high output
14
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10
2033.60
0 0 508.40
0 0 0 0 127.10
2033.60
0 0 508.40
0 0 0 0 127.10
11 0 1
496.48 0
31.78 8.13
(ms)
(s)
/31.5Hz
Always low/high output
14
DA13 to 0 = H'0000 to H'00FF
12
(Data value) × T
DA13 to 0 = H'0100 to H'3FFF
10
8134.41
0 0 2033.60
0 0 0 0 508.40
1 127.10 8.13
(ms)
(s)
(φ/16384)
/7.9Hz
Always low/high output
14
DA13 to 0 = H'0000 to H'003F
12
(Data value) × T
DA13 to 0 = H'0040 to H'3FFF
10
8134.41
0 0 2033.60
0 0 0 0 508.40
1 1 1 1 Setting  


prohibited


Note: * Indicates the conversion cycle when specific DA3 to DA0 bits are fixed.
Rev. 3.00, 03/04, page 271 of 830