HD64F2168 Datasheet, PDF (565/874 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

• Notes on determining address match
The IDR3/ODR3/STR3 addresses depend on mode.
LPC3 SELS KCSE
SMIC BTEN
IDR3/ODR3/STR3 STR3:TWR
E
TR3 NBL TWRE ENBL BL Accessible Mode Host Addresses Related Bit
0 * * * * * Channel 3 access Access disabled Access disabled
disabled
1 0 0 0 0 0 Normal mode LADR3+0/+4
TWR flag bit
1 0 0 0 0 1 BT mode
Access disabled Access disabled
1 0 0 0 1 0 SMIC mode
Access disabled Access disabled
1 0 0 0 1 1 SMIC/BT mode Access disabled Access disabled
1 0 0 1 0 0 TWR mode
LADR3+0/+4
TWR flag bit
1 0 0 1 0 1 TWR/BT mode LADR3+2/+3
TWR flag bit
1 0 0 1 1 0 TWR/SMIC mode LADR3+2/+3
TWR flag bit
1 0 0 1 1 1 TWR/SMIC/BT LADR3+2/+3
mode
TWR flag bit
1 0 1 0 0 0 KCS mode
LADR3+2/+3
TWR flag bit
1 0 1 0 0 1 KCS/BT mode LADR3+2/+3
TWR flag bit
1 0 1 0 1 0 KCS/SMIC mode LADR3+2/+3
TWR flag bit
1 0 1 0 1 1 KCS/SMIC/BT LADR3+2/+3
mode
TWR flag bit
1 1 0 0 0 0 Normal mode LADR3+0/+4
User definition bit
1 1 0 0 0 1 BT mode
Access disabled Access disabled
1 1 0 0 1 0 SMIC mode
Access disabled Access disabled
1 1 0 0 1 1 SMIC/BT mode Access disabled Access disabled
1 1 0 1 0 0 TWR mode
LADR3+0/+4
TWR flag bit
1 1 0 1 0 1 TWR/BT mode LADR3+2/+3
TWR flag bit
1 1 0 1 1 0 TWR/SMIC mode LADR3+2/+3
TWR flag bit
1 1 0 1 1 1 TWR/SMIC/BT LADR3+2/+3
mode
TWR flag bit
1 1 1 0 0 0 KCS mode
LADR3+2/+3
User definition bit
1 1 1 0 0 1 KCS/BT mode LADR3+2/+3
User definition bit
1 1 1 0 1 0 KCS/SMIC mode LADR3+2/+3
User definition bit
1 1 1 0 1 1 KCS/SMIC/BT LADR3+2/+3
mode
User definition bit
1 * 1 1 * * Setting prohibited Setting prohibited Setting prohibited
Note: * Don't care
Rev. 3.00, 03/04, page 525 of 830