SH7604 Datasheet, PDF (93/633 Pages) Hitachi Semiconductor – Hardware Manual

4.8.3 Address Errors Caused by Stacking of Address Error Exception Handling
If the stack pointer value is not a multiple of four, an address error will occur during stacking of
the exception handling (interrupts, etc.). Address error exception handling will begin as soon as
the first exception handling is ended, but address errors will continue to occur. To ensure that
address error exception handling does not go into an endless loop, no address errors are accepted
at that point. This allows program control to be shifted to the address error exception service
routine and enables error handling to be carried out.
When an address error occurs during exception handling stacking, the stacking bus cycle (write) is
executed. In stacking of the status register (SR) and program counter (PC), the SP is decremented
by 4 for both, so the value of SP will not be a multiple of four after the stacking either. The
address value output during stacking is the SP value, so the address where the error occurred is
itself output. This means that the write data stacked will be undefined.
4.8.4 Manual Reset during Register Access
Do not initiate a manual reset during access of a bus state controller (BSC) or user break controller
(UBC) register, otherwise a write error may result.
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