SH7604 Datasheet, PDF (74/633 Pages) Hitachi Semiconductor – Hardware Manual

MOV.L
R3,@(4,R1)^*1
MOV.L
R4,@(8,R1)^*1
MOV.L
R5,@(12,R1)^*1
; Increment pointer
ADD
#H'10,R0
ADD
#H'10,R1
; Loop
CMP/GT
R11,R0
BF
PRG_TRNS
; Branch to the data array forced access space
MOV.L
#DIRECT_RW,R0
JMP
@R0
NOP
.CONST^*2
;
CLOCK2_START
MOV.L
#NEXT_PROG,R3 ;Branch destination address
for the next program
MOV.L
MOV.L
MOV.W
#WTCSR,R0
;WDT setting
#H'0000A507,R1 ;Set enough time for PLL to be
stabilized
R1,@R0
MOV.L
#MDC_FLCR,R2
MOV
#H'01,R1
MOV.B
R1,@R2
; Wait during frequency modification
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
58
;Frequency modification
register setting
;Double the internal frequency