SH7604 Datasheet, PDF (17/633 Pages) Hitachi Semiconductor – Hardware Manual

Section 1 Overview and Pin Functions
1.1 SH7604 Features
The SH7604 is a new-generation single-chip RISC microprocessor that integrates a Hitachi-
original CPU, a multiplier, cache memory, and peripheral functions required for system
configuration.
The CPU features a RISC-type instruction set. Most instructions can be executed in one clock
cycle, which greatly improves instruction execution speed. In addition, the on-chip 4-kbyte cache
memory and divider enhance data processing ability.
The SH7604 is also provided with on-chip peripheral functions including a direct memory access
controller (DMAC), timers, a serial communication interface (SCI), and an interrupt controller.
External memory access support functions (provided by the bus state controller) enable direct
connection to DRAM, synchronous DRAM, and pseudo-SRAM.
The high-speed CPU and comprehensive peripheral functions enable designers to construct high-
performance systems with advanced functionality at low cost, even in applications such as real-
time control that require very high speeds, impossible with conventional microprocessors.
1.1.1 Features of the SH7604
CPU:
• Original Hitachi architecture
• 32-bit internal configuration
• General-registers:
 Sixteen 32-bit general registers
 Three 32-bit control registers
 Four 32-bit system registers
• RISC-type instruction set:
 Instruction length: 16-bit fixed length for improved code efficiency
 Load-store architecture (basic arithmetic and logic operations are executed between
registers)
 Delayed conditional/unconditional branch instructions reduce pipeline disruption during
branching
 Instruction set based on C language
• Instruction execution time: one instruction/state (35 ns/instruction at 28.7 MHz operation)
• Address space: 4 Gbytes available in the architecture (128-Mbyte memory space)
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