SH7604 Datasheet, PDF (303/633 Pages) Hitachi Semiconductor – Hardware Manual

Section 10 Division Unit
10.1 Overview
The division unit (DIVU) divides 64 bits by 32 bits and 32 bits by 32 bits. The results are
expressed as a 32-bit quotient and a 32-bit remainder. When the operation produces an overflow,
an interrupt can be generated as specified.
10.1.1 Features
The division unit has the following features:
• Performs signed division of 64 bits by 32 bits and 32 bits by 32 bits
• Handles 32-bit quotient, 32-bit remainder
• Completes operation execution in 39 cycles
• Controls enabling/disabling of over/underflow interrupts
• Even during the division process, instructions not accessing the division unit can be parallel-
processed
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