SH7604 Datasheet, PDF (83/633 Pages) Hitachi Semiconductor – Hardware Manual

4.1.3 Exception Vector Table
Before exception handling begins, the exception vector table must be written in memory. The
exception vector table stores the start addresses of exception service routines. (The reset exception
table holds the initial values of PC and SP.)
All exception sources are given different vector numbers and vector table address offsets, from
which the vector table addresses are calculated. During exception handling, the start addresses of
the exception service routines are fetched from the exception vector table.
Table 4.3 lists the vector numbers and vector table address offsets. Table 4.4 shows vector table
address calculations.
Table 4.3 Exception Vector Table
Exception Source
Vector
Number
Power-on reset
PC
0
SP
1
Manual reset
PC
2
SP
3
General illegal instruction
4
(Reserved by system)
5
Slot illegal instruction
6
(Reserved by system)
7
8
CPU address error
9
DMA address error
10
Interrupt
NMI
11
User break 12
(Reserved by system)
13
:
31
Trap instruction (user vector)
32
:
63
Vector Table Address
Offset
H'00000000–H'00000003
H'00000004–H'00000007
H'00000008–H'0000000B
H'0000000C–H'0000000F
H'00000010–H'00000013
H'00000014–H'00000017
H'00000018–H'0000001B
H'0000001C–H'0000001F
H'00000020–H'00000023
H'00000024–H'00000027
H'00000028–H'0000002B
H'0000002C–H'0000002F
H'00000030–H'00000033
H'00000034–H'00000037
:
H'0000007C–H'0000007F
H'00000080–H'00000083
:
H'000000FC–H'000000FF
Vector Address
Vector number × 4
VBR + (vector
number × 4)
67