SH7604 Datasheet, PDF (102/633 Pages) Hitachi Semiconductor – Hardware Manual

5.2.5 Interrupt Exception Vectors and Priority Order
Table 5.4 lists interrupt sources and their vector numbers, vector table address offsets and interrupt
priorities.
Each interrupt source is allocated a different vector number and vector table address offset. Vector
table addresses are calculated from vector numbers and address offsets. In interrupt exception
handling, the exception service routine start address is fetched from the vector table entry
indicated by the vector table address. See table 4.4, Calculating Exception Vector Table
Addresses, for more information on this calculation.
IRL interrupts IRL15–IRL1 have interrupt priority levels of 15–1, respectively. On-chip peripheral
module interrupt priorities can be set freely between 0 and 15 for each module by setting interrupt
priority registers A and B (IPRA and IPRB). The ranking of interrupt sources for IPRA and IPRB,
however, must be the order listed under Priority Within IPR Setting Unit in table 5.4 and cannot
be changed. A reset assigns priority level 0 to on-chip peripheral module interrupts. If the same
priority level is assigned to two or more interrupt sources and interrupts from those sources occur
simultaneously, their priority order is the default priority order indicated at the right in table 5.4.
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