SH7604 Datasheet, PDF (630/633 Pages) Hitachi Semiconductor – Hardware Manual

Power-down
Standby control register
H'FFFFFE91
8
(SBYCR)
Item
7
6
Bit Name SBY
HIZ
Initial Value
0
0
R/W
R/W
R/W
Bit
5
4
3
2
1
0
— MSTP4 MSTP3 MSTP2 MSTP1 MSTP0
0
0
0
0
0
0
—
R/W
R/W
R/W
R/W
R/W
Bit
Bit Name
Value
Description
7 Standby (SBY)
0 Executing SLEEP instruction puts the chip into sleep
mode (Initial value)
1 Executing SLEEP instruction puts the chip into standby
mode
6 Port high impedance
0 Pin states held in standby mode (Initial value)
(HIZ)
1 Pins at high impedance in standby mode
4 Module stop 4 (MSTP4) 0 DMAC running (Initial value)
1 Clock supply to DMAC halted
3 Module stop 3 (MSTP3) 0 MULT running (Initial value)
1 Clock supply to MULT halted
2 Module stop 2 (MSTP2) 0 DIVU running (Initial value)
1 Clock supply to DIVU halted
1 Module stop 1 (MSTP1) 0 FRT running (Initial value)
1 Clock supply to FRT halted
0 Module stop 0 (MSTP0) 0 SCI running (Initial value)
1 Clock supply to SCI halted
614