SH7604 Datasheet, PDF (39/633 Pages) Hitachi Semiconductor – Hardware Manual

Table 2.8 Addressing Modes and Effective Addresses (cont)
Addressing
Mode
Register
indirect with
displacement
Instruction
Format
Effective Addresses Calculation
@(disp:4,
Rn)
The effective address is Rn plus a 4-bit
displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
Rn
disp
(zero-extended)
+
×
Rn + disp × 1/2/4
Equation
Byte: Rn +
disp
Word: Rn +
disp × 2
Longword:
Rn + disp × 4
1/2/4
Indexed
@(R0, Rn) The effective address is the Rn value plus R0.
register indirect
Rn
+
Rn + R0
Rn + R0
GBR indirect
with
displacement
@(disp:8,
GBR)
R0
The effective address is the GBR value plus an
8-bit displacement (disp). The value of disp is
zero-extended, and remains the same for a byte
opera-tion, is doubled for a word operation, and is
quadrupled for a longword operation.
GBR
disp
+
(zero-extended)
×
GBR
+ disp × 1/2/4
Byte: GBR +
disp
Word: GBR +
disp × 2
Longword:
GBR + disp ×
4
Indexed GBR @(R0,
indirect
GBR)
1/2/4
The effective address is the GBR value plus the
R0 value.
GBR
+
GBR + R0
GBR + R0
R0
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