SH7604 Datasheet, PDF (131/633 Pages) Hitachi Semiconductor – Hardware Manual

• BDRBH Bits 15 to 0—Break Data B 31 to 16 (BDB31 to BDB16): These bits store the upper
half (bits 31–16) of the data that is the break condition for break channel B.
• BDRBL Bits 15 to 0—Break Data B 15 to 0 (BDB15 to BDB0): These bits store the lower half
(bits 15–0) of the data that is the break condition for break channel B.
6.2.7 Break Data Mask Register B (BDMRB)
BDMRBH:
Bit: 15
14
13
12
11
10
9
8
Bit name: BDMB31 BDMB30 BDMB29 BDMB28 BDMB27 BDMB26 BDMB25 BDMB24
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name: BDMB23 BDMB22 BDMB21 BDMB20 BDMB19 BDMB18 BDMB17 BDMB16
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
BDMRBL:
Bit: 15
14
13
12
11
10
9
8
Bit name: BDMB15 BDMB14 BDMB13 BDMB12 BDMB11 BDMB10 BDMB9 BDMB8
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name: BDMB7 BDMB6 BDMB5 BDMB4 BDMB3 BDMB2 BDMB1 BDMB0
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The two break data mask registers B (BDMRB)—break data mask register BH (BDMRBH) and
break data mask register BL (BDMRBL)—together form a single group. Both are 16-bit
read/write registers. BDMRBH determines which of the bits in the break address set in BDRBH
are masked. BDMRBL determines which of the bits in the break address set in BDRBL are
masked. A power-on reset initializes BDMRBH and BDMRBL to H'0000. Their values are
undefined after a manual reset.
115