SH7604 Datasheet, PDF (514/633 Pages) Hitachi Semiconductor – Hardware Manual

Table 16.9 Bus Timing With PLL Off (CKIO Output) [Mode 2]
(Conditions: V_CC = 3.0 to 5.5 V, Ta = –20 to +75°C)
Item
Address delay time
Symbol Min
t_AD
—
BS delay time
t_BSD
—
CS delay time 1
t_CSD1
—
CS delay time 3
Read write delay time
t_CSD3
—
t_RWD
—
Read strobe delay time 2 t_RSD2
—
Read data setup time 2
t_RDS2
10
Read data hold time 2
Read data hold time 3
(SDRAM)
Read data hold time 5
(DRAM)
Read data hold time 6
(PSRAM)
Read data hold time 7
(interrupt vector)
Write enable delay time 2
Write data delay time
t_RDH2
t_RDH3
t_RDH5
t_RDH6
t_RDH7
t_WED2
t_WDD
0
1/2 tcyc
0
0
0
3
—
Write data hold time 1
t_WDH1
3
Write data hold time 2
Write data hold time 3
DACK delay time 1
t_WDH2
5
t_WDH3
3
t_DACD1
—
DACK delay time 3
t_DACD3
—
Max
28
25
25
25
25
25
—
—
—
—
—
—
25
25
—
—
—
25
25
Unit Figures
ns 16.16, 16.38, 16.47,
16.60, 16.67, 16.69
ns 16.16, 16.38, 16.47,
16.60, 16.67
ns 16.16, 16.38, 16.47,
16.60, 16.67
ns 16.16, 16.67
ns 16.16, 16.38, 16.47,
16.60, 16.67
ns 16.16, 16.47, 16.60,
16.67, 16.69
ns 16.16, 16.38, 16.47,
16.60, 16.67, 16.69
ns 16.16, 16.67
ns 16.38
ns 16.47
ns 16.60
ns 16.69
ns 16.17, 16.61
ns 16.17, 16.39, 16.48,
16.61
ns 16.17, 16.39, 16.48,
16.61
ns 16.17
ns 16.61
ns 16.16, 16.38, 16.47,
16.60, 16.67
ns 16.16, 16.38, 16.47,
16.60, 16.67
498