SH7604 Datasheet, PDF (428/633 Pages) Hitachi Semiconductor – Hardware Manual

Table 15.8 Bus Timing With PLL Off (CKIO Input) [Mode 6]
(Conditions: V_CC = 5.0 V ±10%, Ta = –20 to +75°C)
Item
Address delay time
Symbol Min
t_AD
13
BS delay time
t_BSD
—
CS delay time 1
t_CSD1
—
CS delay time 3
Read write delay time
t_CSD3
—
t_RWD
13
Read strobe delay time 2 t_RSD2
—
Read data setup time 2
t_RDS2
10
Read data hold time 2
Read data hold time 3
Read data hold time 5
(DRAM)
t_RDH2
0
t_RDH3
15
t_RDH5
0
Read data hold time 6
(PSRAM)
t_RDH6
0
Read data hold time 7
(interrupt vector)
t_RDH7
0
Write enable delay time 2 t_WED2
10
Write data delay time
t_WDD
10
Write data hold time 1
t_WDH1
3
Write data hold time 2
Write data hold time 3
DACK delay time 1
t_WDH2
5
t_WDH3
3
t_DACD1
—
DACK delay time 3
t_DACD3
—
Max
28
30
30
28
28
26
—
—
—
—
—
—
25
25
25
25
Unit Figures
ns 15.16, 15.38, 15.47,
15.60, 15.67, 15.69
ns 15.16, 15.38, 15.47,
15.60, 15.67
ns 15.16, 15.38, 15.47,
15.60, 15.67
ns 15.16, 15.67
ns 15.16, 15.38, 15.47,
15.60, 15.67
ns 15.16, 15.47, 15.60,
15.67, 15.69
ns 15.16, 15.38, 15.47,
15.60, 15.67, 15.69
ns 15.16, 15.67
ns 15.38
ns 15.47
ns 15.60
ns 15.69
ns 15.17, 15.61
ns 15.17, 15.39, 15.48,
15.61
ns 15.17, 15.39, 15.48,
15.61
ns 15.17
ns 15.61
ns 15.16, 15.38, 15.47,
15.60, 15.67
ns 15.16, 15.38, 15.47,
15.60, 15.67
412