SH7604 Datasheet, PDF (602/633 Pages) Hitachi Semiconductor – Hardware Manual

INTC
Vector number setting register
WDT (VCRWDT)
H'FFFFFEE4
8/16
Bit
Item
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit Name
WIT WIT WIT WIT WIT WIT WIT
BCM BCM BCM BCM BCM BCM BCM
— V6 V5 V4 V3 V2 V1 V0 — V6 V5 V4 V3 V2 V1 V0
Initial Value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W
R R/W R/W R/W R/W R/W R/W R/W R R/W R/W R/W R/W R/W R/W R/W
Bit
14 to 8
6 to 0
Bit Name
Description
Watchdog timer (WDT) interval These bits set the vector number for the interval
interupt vector number (WITV6– interrupt (ITI) of the watchdog timer (WDT)
WITV0)
Bus state controller (BSC) compareThese bits set the vector number for the compare
match interrupt vector number match interrupt (CMI) of the bus state controller
(BCMV6–BCMV0)
(BSC)
Vector number setting register
DIV (VCRDIV)
H'FFFFFF0C
32
Bit
Item
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit Name — — — — — — — — — — — — — — — —
Initial Value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/W
RRRR RRRR RRRR RRRR
Item
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit Name
Initial Value — — — — — — — — — — — — — — — —
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit
Bit Name
15 to 0 (Vector number setting)
Description
These bits set the vector number for the interrupt
when caused by overflow or underflow of the division
unit
586