SH7604 Datasheet, PDF (130/633 Pages) Hitachi Semiconductor – Hardware Manual

6.2.4 Break Address Register B (BARB)
The channel B break address register has the same bit configuration as BARA.
6.2.5 Break Address Mask Register B (BAMRB)
The channel B break address mask register has the same bit configuration as BAMRA.
6.2.6 Break Data Register B (BDRB)
BDRBH:
Bit:
Bit name:
Initial value:
R/W:
15
BDB31
0
R/W
14
BDB30
0
R/W
13
BDB29
0
R/W
12
BDB28
0
R/W
11
BDB27
0
R/W
10
BDB26
0
R/W
9
BDB25
0
R/W
8
BDB24
0
R/W
Bit:
Bit name:
Initial value:
R/W:
7
BDB23
0
R/W
6
BDB22
0
R/W
5
BDB21
0
R/W
4
BDB20
0
R/W
3
BDB19
0
R/W
2
BDB18
0
R/W
1
BDB17
0
R/W
0
BDB16
0
R/W
BDRBL:
Bit:
Bit name:
Initial value:
R/W:
15
BDB15
0
R/W
14
BDB14
0
R/W
13
BDB13
0
R/W
12
BDB12
0
R/W
11
BDB11
0
R/W
10
BDB10
0
R/W
9
BDB9
0
R/W
8
BDB8
0
R/W
Bit:
Bit name:
Initial value:
R/W:
7
BDB7
0
R/W
6
BDB6
0
R/W
5
BDB5
0
R/W
4
BDB4
0
R/W
3
BDB3
0
R/W
2
BDB2
0
R/W
1
BDB1
0
R/W
0
BDB0
0
R/W
The two break data registers B (BDRB)—break data register BH (BDRBH) and break data register
BL (BDRBL)—together form a single group. Both are 16-bit read/write registers. BDRBH
specifies the upper half (bits 31–16) of the data that is the break condition for channel B, while
BDRBL specifies the lower half (bits 15–0). A power-on reset initializes BDRBH and BDRBL to
H'0000. Their values are undefined after a manual reset.
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