SH7604 Datasheet, PDF (392/633 Pages) Hitachi Semiconductor – Hardware Manual

2. SCI status check and receive data read: read the serial status register (SSR), check that RDRF
is set to 1, then read receive data from the receive data register (RDR) and clear RDRF to 0.
The RXI interrupt can also be used to determine if the RDRF bit has changed from 0 to 1.
3. To continue receiving serial data: read RDR, and clear RDRF to 0 before the MSB (bit 7) of
the current frame is received. If the DMAC is started by a receive-data-full interrupt (RXI) to
read RDR, the RDRF bit is cleared automatically so this step is unnecessary.
Start reception
Read ORER bit in SSR
Yes
ORER = 1?
No
Read RDRF bit in SSR
2
No
RDRF = 1?
Yes
Read receive data in RDR and
clear RDRF bit in SSR to 0
3
No
All data received?
Yes
Clear RE bit in SCR to 0
End reception
1
Error processing
Note: Circled numbers refer to the preceding description of the procedure in the text.
Figure 13.18 Sample Flowchart for Serial Receiving
376