SH7604 Datasheet, PDF (388/633 Pages) Hitachi Semiconductor – Hardware Manual

Transfer direction
One unit of communication data (character or frame)
*
*
Serial clock
Serial data
LSB
MSB
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
Note: High except in continuous transmitting or receiving.
Figure 13.14 Data Format in Clocked Synchronous Communication
In clocked synchronous serial communication, each data bit is output on the communication line
from one falling edge of the serial clock to the next. Data is guaranteed valid at the rising edge of
the serial clock. In each character, the serial data bits are transmitted in order from LSB (first) to
MSB (last). After output of the MSB, the communication line remains in the state of the MSB. In
clocked synchronous mode, the SCI transmits or receives data by synchronizing with the falling
edge of the serial clock.
Communication Format: The data length is fixed at eight bits. No parity bit or multiprocessor bit
can be added.
Clock: An internal clock generated by the built-in baud rate generator or an external clock input
from the SCK pin can be selected as the SCI transmit/receive clock. The clock source is selected
by the C/A bit in the serial mode register (SMR) and bits CKE1 and CKE0 in the serial control
register (SCR). See table 13.9.
When the SCI operates on an internal clock, it outputs the clock signal at the SCK pin. Eight clock
pulses are output per transmitted or received character. When the SCI is not transmitting or
receiving, the clock signal remains in the high state.
Figure 13.15 shows an example of SCI transmit operation. In transmitting serial data, the SCI
operates as follows.
1. The SCI monitors the TDRE bit in SSR. When TDRE is cleared to 0 the SCI recognizes that
the transmit data register (TDR) contains new data and loads this data from TDR into the
transmit shift register (TSR).
2. After loading the data from TDR into TSR, the SCI sets the TDRE bit to 1 and starts
transmitting. If the transmit-data-empty interrupt enable bit (TIE) in SCR is set to 1, the SCI
requests a transmit-data-empty interrupt (TXI) at this time.
If clock output mode is selected, the SCI outputs eight synchronous clock pulses. If an external
clock source is selected, the SCI outputs data in synchronization with the input clock. Data is
output from the TxD pin in order from LSB (bit 0) to MSB (bit 7).
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