SH7604 Datasheet, PDF (310/633 Pages) Hitachi Semiconductor – Hardware Manual

10.4.2 Overflow Flag
When an overflow occurs, the overflow flag (OVF) is set and is not automatically reset. When
OVF is set, the operation is not affected. When necessary, clear it before the operation. The states
of registers when overflow occurs are shown in table 10.2.
Table 10.2 Overflow Processing
Register Overflow Interrupt Enabled
Overflow Interrupt Disabled
DVSR
Holds the value written
Holds the value written
DVDNT
Holds the results of operations until
overflow generation is detected*
The maximum value is set for overflow to
the plus side, or the minimum value for
overflow to the minus side
DVCR
The OVF bit is set
The OVF bit is set
VCRDIV Holds the value written
Holds the value written
DVDNTH Holds the results of operations until
overflow generation is detected*
Holds the results of operations until
overflow generation is detected *
DVDNTL
Holds the results of operations until
overflow generation is detected*
The maximum value is set for overflow to
the plus side, or the minimum value for
overflow to the minus side
Note: In division processing, the intermediate operation result is written for cycles up to detection
of overflow generation.
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