SH7604 Datasheet, PDF (112/633 Pages) Hitachi Semiconductor – Hardware Manual

• Bit 15—NMI Input Level (NMIL): Sets the level of the signal input at the NMI pin. This bit
can be read to determine the NMI pin level. This bit cannot be modified.
Bit 15: NMIL
0
1
Description
NMI input level is low
NMI input level is high
• Bits 14 to 9—Reserved: These bits always read 0. The write value should always be 0.
• Bit 8—NMI Edge Select (NMIE): Selects whether the falling or rising edge of the interrupt
request signal to the NMI pin is detected.
Bit 8: NMIE
0
1
Description
Interrupt request is detected on falling edge of NMI input (Initial value)
Interrupt request is detected on rising edge of NMI input
• Bits 7 to 1—Reserved: These bits always read 0. The write value should always be 0.
• Bit 0—IRL Interrupt Vector Mode Select (VECMD): This bit selects auto-vector mode or
external vector mode for IRL interrupt vector number setting. In auto-vector mode, an
internally determined vector number is set. The IRL15 and IRL14 interrupt vector numbers are
set to 71 and the IRL1 vector number is set to 64. In external vector mode, a value between 0
and 127 can be input as the vector number from the external vector number input pins (D7–
D0).
Bit 0: VECMD
0
1
Description
Auto vector mode, vector number automatically set internally
(Initial value)
External vector mode, vector number set by external input
96