SH7604 Datasheet, PDF (366/633 Pages) Hitachi Semiconductor – Hardware Manual

Table 13.5 SMR Settings
SMR Settings
n
Clock Source
CKS1
CKS0
0
φ/4
0
0
1
φ/16
0
1
2
φ/164
1
0
3
φ/256
1
1
The bit rate error for asynchronous mode is given by the following equation:
Error (%)
=

 (N
+
1)
×
φ × 10⁶
B × 256
×
2^{2n – 1}

– 1_
× 100
Table 13.6 shows the maximum bit rates in asynchronous mode when the baud rate generator is
being used. Tables 13.7 and 13.8 show the maximum rates for external clock input.
Table 13.6 Maximum Bit Rates for Various Frequencies with Baud Rate Generator
(Asynchronous Mode)
φ (MHz)
4
4.9152
8
9.8304
12
14.7456
16
19.6608
20
24
24.576
28.7
Maximum Bit Rate (bits/s)
n
31250
0
38400
0
62500
0
76800
0
93750
0
115200
0
125000
0
153600
0
156250
0
187500
0
192000
0
224218
0
Settings
N
0
0
0
0
0
0
0
0
0
0
0
0
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