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SH7604 Datasheet, PDF (163/633 Pages) Hitachi Semiconductor – Hardware Manual
• Bits 5 to 3—Clock Select Bits (CKS2–CKS0)
Bit 5: CKS2
0
1
Bit 4: CKS1
0
1
0
1
Bit 3: CKS0
0
1
0
1
0
1
0
1
Description
Count-up disabled
CLK/4
CLK/16
CLK/64
CLK/256
CLK/1024
CLK/2048
CLK/4096
(Initial value)
• Bits 2 to 0—Reserved: These bits always read 0. The write value should always be 0.
7.2.6 Refresh Timer Counter (RTCNT)
Bit: 15
14
13
12
11
10
9
8
Bit name: —
—
—
—
—
—
—
—
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
Bit: 7
6
5
4
3
2
1
0
Bit name:
Initial value: 0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
The 8-bit counter RTCNT counts up with input clocks. The clock select bit of RTCSR selects an
input clock. RTCNT values can always be read/written by the CPU. When RTCNT matches
RTCOR, RTCNT is cleared. Returns to 0 after it counts up to 255.
• Bits 15 to 8—Reserved: These bits always read 0. The write value should always be 0.
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