SH7604 Datasheet, PDF (491/633 Pages) Hitachi Semiconductor – Hardware Manual

15.3.5 Free-Running Timer Timing
Table 15.11 Free-Running Timer Timing (Conditions: V_CC = 5.0 V ±10%, Ta = –20 to
+75°C)
Item
Output compare output delay time
(PLL Off, On)
Output compare output delay time
(PLL On, 1/4 cycle delay)
Input capture input setup time
(PLL Off, On)
Input capture input setup time
(PLL On, 1/4 cycle delay)
Timer clock input setup time
(PLL Off, On)
Timer clock input setup time
(PLL On, 1/4 cycle delay)
Timer clock pulse width (single edge)
Timer clock pulse width (both edges)
Symbol Min
t_TOCD
—
Max
160
Unit Figure
ns 15.73
t_TOCD
—
1/4 tcyc + 160 ns
t_TICS
80
—
ns
t_TICS
80 – 1/4 tcyc —
ns
t_TCKS
80
—
ns 15.74
t_TCKS
80 –1/4 tcyc —
ns
t_TCKWH 4.5
—
t_cyc
t_TCKWL 8.5
—
t_cyc
CKIO
FTOA,
FTOB
FTI
t_TOCD
t_TICS
Figure 15.73 FRT Input/Output Timing
CKIO
FTCI
t_TCKWL
t_TCKS
t_TCKWH
Figure 15.74 FRT Clock Input Timing
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