SH7604 Datasheet, PDF (108/633 Pages) Hitachi Semiconductor – Hardware Manual

Bit: 15
14
13
12
11
10
9
8
Bit name: — SERV6 SERV5 SERV4 SERV3 SERV2 SERV1 SERV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name: — SRXV6 SRXV5 SRXV4 SRXV3 SRXV2 SRXV1 SRXV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
• Bits 15, 7—Reserved: These bits always read 0. The write value should always be 0.
• Bits 14 to 8—Serial Communication Interface (SCI) Receive-Error Interrupt Vector Number
(SERV6–SERV0): These bits set the vector number for the serial communication interface
(SCI) receive-error interrupt (ERI). There are seven bits, so the value can be set between 0 and
127.
• Bits 6 to 0—Serial Communication Interface (SCI) Receive-Data-Full Interrupt Vector
Number (SRXV6–SRXV0): These bits set the vector number for the serial communication
interface (SCI) receive-data-full interrupt (RXI). There are seven bits, so the value can be set
between 0 and 127.
5.3.5 Vector Number Setting Register B (VCRB)
Vector number setting register B (VCRB) is a 16-bit read/write register that sets the SCI transmit-
data-empty interrupt and transmit-end interrupt vector numbers (0–127). VCRB is initialized to
H'0000 by a reset. It is not initialized in standby mode.
Bit: 15
14
13
12
11
10
9
8
Bit name: — STXV6 STXV5 STXV4 STXV3 STXV2 STXV1 STXV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
Bit: 7
6
5
4
3
2
1
0
Bit name: — STEV6 STEV5 STEV4 STEV3 STEV2 STEV1 STEV0
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R/W R/W R/W R/W R/W R/W R/W
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