English
Language : 

SH7604 Datasheet, PDF (483/633 Pages) Hitachi Semiconductor – Hardware Manual
CKIO
Tp Trc Trc1 Trc2 Trc2
Trc2 Trc1 Tre
Address
BS
CSn
RD/WR,
WE
RD
WEn,
CASxx,
DQMxx
D31–D0
DACKn
WAIT
RAS,
CE
CAS,
OE
tCED2
tOED2 tOED2
tOED2
CKE
Figure 15.65 Pseudo-SRAM Self-Refresh Cycle
(PLL Off, TRP = 1 Cycle, TRAS = 2 Cycles)
tCED2
tOED2
467