SH7604 Datasheet, PDF (263/633 Pages) Hitachi Semiconductor – Hardware Manual

9.3.2 DMA Transfer Requests
DMA transfer requests are usually generated in either the data transfer source or destination, but
they can also be generated by devices that are neither the source nor the destination. Transfers can
be requested in three modes: auto-request, external request, and on-chip peripheral module
request. The request mode is selected with the AR bit in DMA channel control registers 0 and 1
(CHCR0, CHCR1) and the RS0 and RS1 bits in DMA request/response selection control registers
0 and 1 (DRCR0, DRCR1).
Table 9.3 Selecting the DMA Transfer Request Using the AR and RS Bits
CHCR
DRCR
AR
RS1 RS0 Request Mode
0
0 0 Module request mode
01
10
1
X X Auto-request mode
Resource Select
DREQ external request (external request mode)
RXI (SCI receive) request
TXI (SCI transmit) request
Auto-Request: When there is no transfer request signal from an external source (as in a memory-
to-memory transfer or a transfer between memory and an on-chip peripheral module unable to
request a transfer), the auto-request mode allows the DMAC to automatically generate a transfer
request signal internally. When the DE bits in CHCR0 and CHCR1 and the DME bit in the DMA
operation register (DMAOR) are set to 1, the transfer begins (so long as the TE bits in CHCR0 and
CHCR1 and the NMIF and AE bits in DMAOR are all 0).
External Request: In this mode a transfer is started by a transfer request signal (DREQ) from an
external device. Choose one of the modes shown in table 9.4 according to the application system.
When DMA transfer is enabled (DE = 1, DME = 1, TE = 0, NMIF = 0, AE = 0), a transfer is
performed upon input of a DREQ signal.
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