SH7604 Datasheet, PDF (61/633 Pages) Hitachi Semiconductor – Hardware Manual

From any state when
RES = 0 and NMI = 1
From any state when
RES = 0 and NMI = 0
Power-on reset state
RES = 0, NMI = 0
RES = 0, NMI = 1
Manual reset state
Interrupt or DMA
address error
RES = 1,
NMI = 1
RES = 1,
NMI = 0
Exception handling state
Reset state
Bus request
cleared
Bus request
generated
Bus-released state
Exception
NMI interrupt
Exception
handling
ends
Bus request
generated
Bus request
cleared
Bus request
generated
Bus request
cleared
Program execution state
SLEEP
instruction with
SBY bit cleared
MSTP
bit cleared
MSTP
bit set
SLEEP
instruction with
SBY bit set
Sleep mode
Standby mode
Module standby
Power-down state
Figure 2.6 Transitions between Processing States
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