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SH7604 Datasheet, PDF (493/633 Pages) Hitachi Semiconductor – Hardware Manual | |||
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15.3.7 Serial Communication Interface Timing
Table 15.13 Serial Communication Interface Timing
(Conditions: VCC = 5.0 V ±10%, Ta = â20 to +75°C)
Item
Symbol Min
Input clock cycle
tscyc
16
Input clock cycle (clocked synchronous mode) tscyc
24
Input clock pulse width
tsckw
0.4
Transmit data delay time (clocked synchronous tTXD
â
mode)
Receive data setup time (clocked synchronous tRXS
70
mode)
Receive data hold time (clocked synchronous tRXH
70
mode)
Max
â
â
0.6
70
â
â
Unit
tcyc
tcyc
tscyc
ns
Figure
15.76
15.77
ns
ns
tSCKW
SCK0
tscyc
Figure 15.76 Input Clock Input/Output Timing
SCK0
TxD0
(transmit data)
RxD0
(receive data)
tscyc
tTXD
tRXS tRXH
Figure 15.77 SCI Input/Output Timing (Clocked Synchronous Mode)
477
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