SH7604 Datasheet, PDF (387/633 Pages) Hitachi Semiconductor – Hardware Manual

Serial
data
Start Data
1 _bit (ID2)
0 D₀ D₁
Stop Start Data
MPB bit bit (Data 2)
D₇ 1 1 0 D₀ D₁
Stop
MPB bit
1
D₇ 0 1
Idling
(marking)
MPB
MPIE
RDRF
RDR
value
ID1
ID2
Data2
RXI interrupt
request
(multiprocessor
interrupt)
generated,
MPIE = 0
RXI interrupt
handler
reads RDR data
and clears
RDRF bit to 0
ID is that of
this processor,
so reception
continues unchanged
and data is received
by the RXI interrupt
handler
MPIE
bit set to 1
again
Figure 13.13 Example of SCI Receive Operation
(Own ID Matches Data, 8-Bit Data with Multiprocessor Bit and One Stop Bit) (cont)
13.3.4 Clocked Synchronous Operation
In clocked synchronous mode, the SCI transmits and receives data in synchronization with clock
pulses. This mode is suitable for high-speed serial communication.
The SCI transmitter and receiver are independent, so full duplex communication is possible while
sharing the same clock. The transmitter and receiver are also double buffered, so continuous
transmitting or receiving is possible by reading or writing data while transmitting or receiving is in
progress.
Figure 13.14 shows the general format in clocked synchronous serial communication.
371