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| SH7604 Datasheet, PDF (484/633 Pages) Hitachi Semiconductor – Hardware Manual | |||
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CKIO
CKIO
BS
CSn
RD/WR,
WE
RD
WEn,
CASxx,
DQMxx
D31âD0
DACKn
WAIT
T1
TW
tAD
T2
TW
tAD
T2
tAD
tBSD
tBSD
tBSD
tBSD
tCSD1
tRWD
tCSD2
tRWD
tRSD1
tWED1
tRSD1
tRSD1
tRSD1
tRDH2
tRDS1
tWED1
tRDH2
tRDS1
tDACD1
tDACD2 tDACD1
tDACD2
tWTS tWTH
tWTS tWTH
RAS,
CE
CAS,
OE
CKE
Note: The DACKn waveform shown is for the case where active-high has been specified.
Figure 15.66 Burst ROM Read Cycle (PLL On, 1 Wait)
468
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