SH7604 Datasheet, PDF (167/633 Pages) Hitachi Semiconductor – Hardware Manual

A26–A0 ^D15
000000 7
000001
000002 7
000003
000000 7
000002 7
000000 7
000002 23
D7
0
7
0
7
0 15
0 15
0 15
16 31
D0 _{16-bit device data input/output pin}
Byte read/write of address 0
0 Byte read/write of address 1
Byte read/write of address 2
0 Byte read/write of address 3
8 Word read/write of address 0
8 Word read/write of address 2
8
24 Longword read/write of address 0
Figure 7.6 16-Bit External Devices and Their Access Units (Little-Endian Format)
Using the Little-Endian Function: The SH7604 normally uses big-endian alignment for data
input and output, but an endian conversion function is provided for the CS2 space to enable
connection to little-endian devices. The following two points should be noted when using this
function:
• Little endian alignment should be used in the CS2 through-area.
• When data is shared with another little-endian device using this function, the same access size
must be used by both. For example, to read data written in longword size by another little-
endian device, the SH7604 must use longword read access.
7.4 Accessing Ordinary Space
7.4.1 Basic Timing
A strobe signal is output by ordinary space accesses of CS0–CS3 spaces to provide primarily for
SRAM direct connections. Figure 7.7 shows the basic timing of ordinary space accesses. Ordinary
accesses without waits end in 2 cycles. The BS signal is asserted for 1 cycle to indicate the start of
the bus cycle. The CSn signal is negated by the fall of clock T2 to ensure the negate period. The
negate period is thus half a cycle when accessed at the minimum pitch.
The access size is not specified during a read. The correct access start address will be output to the
LSB of the address, but since no access size is specified, the read will always be 32 bits for 32-bit
devices and 16 bits for 16-bit devices. For writes, only the WE signal of the byte that will be
written is asserted. For 32-bit devices, WE3 specifies writing to a 4n address and WE0 specifies
writing to a 4n+3 address. For 16-bit devices, WE1 specifies writing to a 2n address and WE0
specifies writing to a 2n+1 address. For 8-bit devices, only WE0 is used.
The RD signal must be used to control data output of external devices so that conflicts do not
occur between trace information for emulators or the like output from the SH7604 and external
device read data. In other words, when data buses are provided with buffers, the RD signal must
be used for data output in the read direction. When RD/WR signals do not perform accesses, the
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