SH7206 Datasheet, PDF (99/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 3 Clock Pulse Generator (CPG)
Table 3.3 Relationship between Clock Operating Mode and Frequency Range
Clock
Operating FRQCR
Mode
Setting
PLL Frequency
Multiplier
PLL
PLL
Circuit 1 Circuit 2
Ratio of
Internal Clock
Frequencies
(I:B:P)*¹
Input Clock*²
Selectable Frequency Range (MHz)
Output Clock Internal Clock Bus Clock
(CKIO Pin) (Iφ)
(Bφ)
2
H'1001 ON (×1) ON (×4) 4:4:2
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'1002 ON (×1) ON (×4) 4:4:4/3
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'1003 ON (×1) ON (×4) 4:4:1
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'1004 ON (×1) ON (×4) 4:4:2/3
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'1005 ON (×1) ON (×4) 4:4:1/2
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'1006 ON (×1) ON (×4) 4:4:1/3
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'1103 ON (×2) ON (×4) 8:4:2
10 to 16.67
40 to 66.67
80 to 133.36 40 to 66.67
H'1104 ON (×2) ON (×4) 8:4:4/3
10 to 16.67
40 to 66.67
80 to 133.36 40 to 66.67
H'1105 ON (×2) ON (×4) 8:4:1
10 to 16.67
40 to 66.67
80 to 133.36 40 to 66.67
H'1106 ON (×2) ON (×4) 8:4:2/3
10 to 16.67
40 to 66.67
80 to 133.36 40 to 66.67
H'1113 ON (×2) ON (×4) 4:4:2
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'1114 ON (×2) ON (×4) 4:4:4/3
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'1115 ON (×2) ON (×4) 4:4:1
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'1116 ON (×2) ON (×4) 4:4:2/3
10 to 16.67
40 to 66.67
40 to 66.67
40 to 66.67
H'120C ON (×3) ON (×4) 12:4:2
10 to 16.67
40 to 66.67
120 to 200
40 to 66.67
H'120E ON (×3) ON (×4) 12:4:1
10 to 16.67
40 to 66.67
120 to 200
40 to 66.67
H'122C ON (×3) ON (×4) 4:4:2
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'122E ON (×3) ON (×4) 4:4:1
10 to 16.67 40 to 66.67 40 to 66.67 40 to 66.67
H'1305 ON (×4) ON (×4) 16:4:2
10 to 12.5
40 to 50
160 to 200
40 to 50
H'1306 ON (×4) ON (×4) 16:4:4/3
10 to 12.5
40 to 50
160 to 200
40 to 50
H'1315 ON (×4) ON (×4) 8:4:2
10 to 12.5
40 to 50
80 to 100
40 to 50
H'1316 ON (×4) ON (×4) 8:4:4/3
10 to 12.5
40 to 50
80 to 100
40 to 50
H'1335 ON (×4) ON (×4) 4:4:2
10 to 12.5
40 to 50
40 to 50
40 to 50
H'1336 ON (×4) ON (×4) 4:4:4/3
10 to 12.5
40 to 50
40 to 50
40 to 50
7
H'1000 ON (×1) OFF
1:1:1
20 to 33.33

20 to 33.33 20 to 33.33
H'1001 ON (×1) OFF
1:1:1/2
20 to 66.67

20 to 66.67 20 to 66.67
H'1002 ON (×1) OFF
1:1:1/3
20 to 66.67

20 to 66.67 20 to 66.67
H'1003 ON (×1) OFF
1:1:1/4
20 to 66.67

20 to 66.67 20 to 66.67
Peripheral
Clock (Pφ)
20 to 33.33
13.33 to 22.23
10 to 16.67
6.7 to 11.11
5 to 8.34
3.33 to 5.56
20 to 33.33
13.33 to 22.23
10 to 16.67
6.7 to 11.11
20 to 33.33
13.33 to 22.23
10 to 16.67
6.7 to 11.11
20 to 33.33
10 to 16.67
20 to 33.33
10 to 16.67
20 to 25
13.33 to 16.67
20 to 25
13.33 to 16.67
20 to 25
13.33 to 16.67
20 to 33.33
10 to 33.33
6.67 to 22.22
5 to 16.67
Rev. 3.00 Jun. 18, 2008 Page 75 of 1160
REJ09B0191-0300