SH7206 Datasheet, PDF (272/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 8 Bus State Controller (BSC)
(5) Burst MPX-I/O
• CS6WCR
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
MPXAW[1:0] MPXMD -
BW[1:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R R/W R/W R/W R R/W R/W
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
W[3:0]
WM
-
-
-
-
-
-
Initial value: 0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R R/W R/W R/W R/W R/W R
R
R
R
R
R
Bit
Bit Name
31 to 22 
Initial
Value
All 0
21, 20 MPXAW[1:0] 00
R/W Description
R
Reserved
These bits are always read as 0. The write value
should always be 0.
R/W Number of Address Cycle Waits
Specify the number of waits to be inserted in the
address cycle.
00: No cycle
01: 1 cycle
10: 2 cycles
11: 3 cycles
Rev. 3.00 Jun. 18, 2008 Page 248 of 1160
REJ09B0191-0300