SH7206 Datasheet, PDF (632/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Pφ
Input capture
signal
TCNT
N
TGR
N
TGF flag
TGI interrupt
Figure 10.112 TGI Interrupt Timing (Input Capture) (Channel 5)
(3) TCFV Flag/TCFU Flag Setting Timing
Figure 10.113 shows the timing for setting of the TCFV flag in TSR on overflow, and TCIV
interrupt request signal timing.
Figure 10.114 shows the timing for setting of the TCFU flag in TSR on underflow, and TCIU
interrupt request signal timing.
Pφ
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
H'FFFF
H'0000
TCIV interrupt
Figure 10.113 TCIV Interrupt Setting Timing
Rev. 3.00 Jun. 18, 2008 Page 608 of 1160
REJ09B0191-0300