SH7206 Datasheet, PDF (1137/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 25 Electrical Characteristics
CKIO
A25 to A0
CExx
RD/WR
Read
ICIORD
D15 to D0
Write
ICIOWR
D15 to D0
BS
DACKn
TENDn*
Tpcm1
t_AD1
Tpcm1w
t_CSD1
t_RWD1
t_ICRSD
t_ICWSD
t_WDD1
t_BSD
t_BSD
t_DACD
Tpcm1w
Tpcm1w
Tpcm2
t_AD1
t_CSD1
t_RWD1
t_ICRSD
t_RDH1
t_RDS1
t_ICWSD
t_WDH4
t_WDH1
t_DACD
Note: * The waveform for DACKn and TENDn is when active low is specified.
Figure 25.42 PCMCIA I/O Card Bus Cycle
(TED = 0 Cycle, TEH = 0 Cycle, No Wait)
Rev. 3.00 Jun. 18, 2008 Page 1113 of 1160
REJ09B0191-0300