SH7206 Datasheet, PDF(224/1188 Page) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

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SH7206 Datasheet, PDF (224/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

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Section 8 Bus State Controller (BSC)

6. PCMCIA direct interface

ï£§ Supports the IC memory card and I/O card interface defined in JEIDA specifications Ver.

4.2 (PCMCIA2.1 Rev. 2.1).

ï£§ Wait-cycle insertion controllable by program.

7. SRAM interface with byte selection

ï£§ Can connect directly to a SRAM with byte selection.

8. Burst MPX-I/O interface

ï£§ Can connect directly to a peripheral LSI that needs an address/data multiplexing.

ï£§ Supports burst transfer.

9. Burst ROM interface (clocked synchronous)

ï£§ Can connect directly to a ROM of the clocked synchronous type.

10. Bus arbitration

ï£§ Shares all of the resources with other CPU and outputs the bus enable after receiving the

bus request from external devices.

11. Refresh function

ï£§ Supports the auto-refresh and self-refresh functions.

ï£§ Specifies the refresh interval using the refresh counter and clock selection.

ï£§ Can execute concentrated refresh by specifying the refresh counts (1, 2, 4, 6, or 8).

12. Usage as interval timer for refresh counter

ï£§ Generates an interrupt request at compare match.

Rev. 3.00 Jun. 18, 2008 Page 200 of 1160

REJ09B0191-0300

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