SH7206 Datasheet, PDF (777/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.5 Bit Rates and SCBRR Settings (Clocked Synchronous Mode)
Pφ (MHz)
Bit Rate
(bit/s)
5
nN
8
nN
16
nN
28.7
nN
30
nN
33
nN
110
————————————
250
3
77 3
124 3
249 — — — — — —
500
3
38 2
249 3
124 3
223 3
233 3
255
1k
2
77 2
124 2
249 3
111 3
116 3
125
2.5 k
1
124 1
199 2
99 2
178 2
187 2
200
5k
0
249 1
99 1
199 2
89 2
93 2
100
10 k
0
124 0
199 1
99 1
178 1
187 1
200
25 k
0
49 0
79 0
159 1
71 1
74 1
80
50 k
0
24 0
39 0
79 0
143 0
149 0
160
100 k
——0
19 0
39 0
71 0
74 0
80
250 k
0
4
0
7
0
15 — — 0
29 0
31
500 k
——0
3
0
7
——0
14 0
15
1M
——0
1
0
3
————0
7
2M
0
0* 0
1
——————
[Legend]
Blank: No setting possible
—: Setting possible, but error occurs
*:
Continuous transmission/reception not possible
Rev. 3.00 Jun. 18, 2008 Page 753 of 1160
REJ09B0191-0300