SH7206 Datasheet, PDF (1109/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

CKIO
A25 to A0
CSn
RD/WR
Read
RD
D31 to D0
Write
WEn
D31 to D0
BS
DACKn
TENDn*
WAIT
T1
t_AD1
t_AS
t_CSD1
t_CS
t_RWD1
tRSD
TwX
t_WED1
t_WDD1
t_BSD
t_BSD
t_DACD
t_WTH
t_WTS
t_WTH
tWTS
Section 25 Electrical Characteristics
T2
t_AD1
t_CSD1
t_RWD1
t_RSD
t_AH
t_RDS1
t_RDH1
tWED1
t_AH
t_WDH1
t_DACD
Note: * The waveform for DACKn and TENDn is when active low is specified.
Figure 25.14 Basic Bus Timing for Normal Space (One External Wait Cycle)
Rev. 3.00 Jun. 18, 2008 Page 1085 of 1160
REJ09B0191-0300