SH7206 Datasheet, PDF (698/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 12 Port Output Enable 2 (POE2)
Initial
Bit Bit Name Value R/W Description
14
POE2F 0
R/(W)*¹ POE2 Flag
Indicates that a high impedance request has been input
to the POE2 pin.
[Clearing conditions]
• By writing 0 to POE2F after reading POE2F = 1
(when the falling edge is selected by bits 5 and 4 in
ICSR1)
• By writing 0 to POE2F after reading POE2F = 1 after
a high level input to POE2 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 5 and 4 in ICSR1)
[Setting condition]
13
POE1F 0
• When the input set by bits 5 and 4 in ICSR1 occurs at
the POE2 pin
R/(W)*¹ POE1 Flag
Indicates that a high impedance request has been input
to the POE1 pin.
[Clearing conditions]
• By writing 0 to POE1F after reading POE1F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR1)
• By writing 0 to POE1F after reading POE1F = 1 after
a high level input to POE1 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR1)
[Setting condition]
• When the input set by bits 3 and 2 in ICSR1 occurs at
the POE1 pin
Rev. 3.00 Jun. 18, 2008 Page 674 of 1160
REJ09B0191-0300