SH7206 Datasheet, PDF (627/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Pφ
Input capture
signal
Counter clear
signal
TCNT
N
H'0000
TGR
N
Figure 10.102 Counter Clear Timing (Input Capture) (Channels 0 to 5)
(5) Buffer Operation Timing
Figures 10.103 to 10.105 show the timing in buffer operation.
Pφ
TCNT
n
n+1
Compare
match buffer
signal
TGRA,
TGRB
n
N
TGRC,
TGRD
N
Figure 10.103 Buffer Operation Timing (Compare Match)
Rev. 3.00 Jun. 18, 2008 Page 603 of 1160
REJ09B0191-0300