SH7206 Datasheet, PDF (528/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Figure 10.6 illustrates periodic counter operation.
TCNT value
TGR
Counter cleared by TGR
compare match
H'0000
CST bit
TGF
Time
Flag cleared by software or
DMAC activation
Figure 10.6 Periodic Counter Operation
(2) Waveform Output by Compare Match
The MTU2 can perform 0, 1, or toggle output from the corresponding output pin using compare
match.
(a) Example of Setting Procedure for Waveform Output by Compare Match
Figure 10.7 shows an example of the setting procedure for waveform output by compare match
Output selection
Select waveform output [1]
mode
Set output timing
[2]
[1] Select initial value 0 output or 1 output,
and compare match output value 0
output, 1 output, or toggle output, by
means of TIOR. The set initial value is
output at the TIOC pin until the first
compare match occurs.
[2] Set the timing for compare match
generation in TGR.
[3] Set the CST bit in TSTR to 1 to start the
count operation.
Start count operation [3]
<Waveform output>
Figure 10.7 Example of Setting Procedure for Waveform Output by Compare Match
Rev. 3.00 Jun. 18, 2008 Page 504 of 1160
REJ09B0191-0300