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SH7206 Datasheet, PDF (717/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series | |||
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Section 12 Port Output Enable 2 (POE2)
12.4 Operation
Table 12.4 shows the target pins for high-impedance control and conditions to place the pins in
high-impedance state.
Table 12.4 Target Pins and Conditions for High-Impedance Control
Pins
Conditions
MTU2 high-current pins
(PE9/TIOC3B and
PE11/TIOC3D)
Input level detection,
output level comparison, or
SPOER setting
MTU2 high-current pins
(PE12/TIOC4A and
PE14/TIOC4C)
Input level detection,
output level comparison, or
SPOER setting
MTU2 high-current pins
(PE13/TIOC4B and
PE15/TIOC4D)
Input level detection,
output level comparison, or
SPOER setting
MTU2S high-current pins Input level detection,
(PD9/TIOC3BS and
output level comparison, or
PD11/TIOC3DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD12/TIOC4AS and output level comparison, or
PD14/TIOC4CS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD13/TIOC4BS and output level comparison, or
PD15/TIOC4DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD29/TIOC3BS and output level comparison, or
PD28/TIOC3DS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD27/TIOC4AS and output level comparison, or
PD25/TIOC4CS)
SPOER setting
MTU2S high-current pins Input level detection,
(PD26/TIOC4BS and output level comparison, or
PD24/TIOC4DS)
SPOER setting
MTU2 channel 0 pins
(PE0/TIOC0A)
Input level detection or
SPOER setting
Detailed Conditions
MTU2P1CZE â¢
((POE0F + POE1F + POE2F + POE3F) +
(OSF1 ⢠OCE1) + (MTU2CH34HIZ))
MTU2P2CZE â¢
((POE0F + POE1F + POE2F + POE3F) +
(OSF1 ⢠OCE1) + (MTU2CH34HIZ))
MTU2P3CZE â¢
((POE0F + POE1F + POE2F + POE3F) +
(OSF1 ⢠OCE1) + (MTU2CH34HIZ))
MTU2SP4CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2SP5CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2SP6CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2SP7CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2SP8CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2SP9CZE â¢
((POE4F + POE5F + POE6F + POE7F) +
(OSF2 ⢠OCE2) + (MTU2SHIZ))
MTU2PE0ZE â¢
((POE8F ⢠POE8E) + (MTU2CH0HIZ))
Rev. 3.00 Jun. 18, 2008 Page 693 of 1160
REJ09B0191-0300
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