SH7206 Datasheet, PDF (916/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 19 Pin Function Controller (PFC)
19.2.3 Port B I/O Register (PBIOR)
PBIOR is a 16-bit readable/writable register that is used to set the pins on port B as inputs or
outputs. Bits PB9IOR, PB5IOR, and PB4IOR correspond to pins PB9/IRQ7/A21/ADTRG,
PB5/IRQ3/POE3/CASL, and PB4/IRQ2/POE2/RASL, respectively. PBIOR is enabled when the
port B pins are functioning as general-purpose inputs/outputs (PB9, PB5, and PB4). In other
states, PBIOR is disabled. A given pin on port B will be an output pin if the corresponding bit in
PBIOR is set to 1, and an input pin if the bit is cleared to 0.
Bits 15 to 10, 8 to 6, and 3 to 0 of PBIOR are reserved. These bits are always read as 0. The write
value should always be 0.
PBIOR is initialized to H'0000 by a power-on reset; however, the register is not initialized by a
manual reset or in sleep mode or software standby mode.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
PB9
IOR
-
-
-
PB5 PB4
IOR IOR
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R R R R R R/W R R R R/W R/W R R R R
19.2.4 Port B Control Registers 1 to 3 (PBCR1 to PBCR3)
PBCR1 to PBCR3 are 16-bit readable/writable registers that are used to select the function of the
multiplexed pins on port B.
PBCR1 to PBCR3 are initialized to the values shown in table 19.7 by a power-on reset; however,
the registers are not initialized by a manual reset or in sleep mode or software standby mode.
(1) Port B Control Register 3 (PBCR3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
PB9MD[2:0]
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
R/W: R
R
R
R
R
R
R
R
R R/W R/W R/W R
R
R
R
Rev. 3.00 Jun. 18, 2008 Page 892 of 1160
REJ09B0191-0300