SH7206 Datasheet, PDF (843/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 16 I²C Bus Interface 3 (IIC3)
SCL
(Master output)
SDA
(Master output)
SCL
(Slave output)
SDA
(Slave output)
RDRF
ICDRS
ICDRR
User
processing
9
1
2
3
4
5
6
7
8
9
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
A
A
Data 1
Data 2
Data 1
[3] Set ACKBT
[3] Read ICDRR [4] Read ICDRR
Figure 16.12 Slave Receive Mode Operation Timing (2)
Rev. 3.00 Jun. 18, 2008 Page 819 of 1160
REJ09B0191-0300