SH7206 Datasheet, PDF (16/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

10.5.1 Interrupt Sources and Priorities ............................................................................ 594
10.5.2 DMAC Activation ................................................................................................ 596
10.5.3 A/D Converter Activation..................................................................................... 597
10.6 Operation Timing............................................................................................................... 599
10.6.1 Input/Output Timing............................................................................................. 599
10.6.2 Interrupt Signal Timing ........................................................................................ 606
10.7 Usage Notes ....................................................................................................................... 611
10.7.1 Module Standby Mode Setting ............................................................................. 611
10.7.2 Input Clock Restrictions ....................................................................................... 611
10.7.3 Caution on Period Setting ..................................................................................... 612
10.7.4 Contention between TCNT Write and Clear Operations...................................... 612
10.7.5 Contention between TCNT Write and Increment Operations............................... 613
10.7.6 Contention between TGR Write and Compare Match.......................................... 614
10.7.7 Contention between Buffer Register Write and Compare Match ......................... 615
10.7.8 Contention between Buffer Register Write and TCNT Clear ............................... 616
10.7.9 Contention between TGR Read and Input Capture............................................... 617
10.7.10 Contention between TGR Write and Input Capture.............................................. 618
10.7.11 Contention between Buffer Register Write and Input Capture ............................. 619
10.7.12 TCNT2 Write and Overflow/Underflow Contention in Cascade Connection ...... 619
10.7.13 Counter Value during Complementary PWM Mode Stop .................................... 621
10.7.14 Buffer Operation Setting in Complementary PWM Mode ................................... 621
10.7.15 Reset Sync PWM Mode Buffer Operation and Compare Match Flag .................. 622
10.7.16 Overflow Flags in Reset Synchronous PWM Mode ............................................. 623
10.7.17 Contention between Overflow/Underflow and Counter Clearing......................... 624
10.7.18 Contention between TCNT Write and Overflow/Underflow................................ 625
10.7.19 Cautions on Transition from Normal Operation or PWM Mode 1 to Reset-
Synchronized PWM Mode.................................................................................... 625
10.7.20 Output Level in Complementary PWM Mode and Reset-Synchronized PWM
Mode..................................................................................................................... 626
10.7.21 Interrupts in Module Standby Mode ..................................................................... 626
10.7.22 Simultaneous Capture of TCNT_1 and TCNT_2 in Cascade Connection............ 626
10.8 MTU2 Output Pin Initialization......................................................................................... 627
10.8.1 Operating Modes .................................................................................................. 627
10.8.2 Reset Start Operation ............................................................................................ 627
10.8.3 Operation in Case of Re-Setting Due to Error during Operation, Etc................... 628
10.8.4 Overview of Initialization Procedures and Mode Transitions in Case of Error
during Operation, Etc............................................................................................ 629
Section 11 Multi-Function Timer Pulse Unit 2S (MTU2S) .............................. 659
11.1 Input/Output Pins............................................................................................................... 663
Rev. 3.00 Jun. 18, 2008 Page xvi of xxiv