SH7206 Datasheet, PDF (283/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 8 Bus State Controller (BSC)
8.4.6 Refresh Timer Counter (RTCNT)
RTCNT is an 8-bit counter that increments using the clock selected by bits CKS[2:0] in RTCSR.
When RTCNT matches RTCOR, RTCNT is cleared to 0. The value in RTCNT returns to 0 after
counting up to 255. When the RTCNT is written, the upper 16 bits of the write data must be
H'A55A to cancel write protection. This counter is initialized to H'00000000 by a power-on reset
and retains the value by a manual reset and in software standby mode.
Bit: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit: 15 14 13 12 11 10 9
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
8
7
6
5
4
3
2
1
0
-
0
0
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R/W R/W R/W
Bit
31 to 8
Initial
Bit Name Value

All 0
7 to 0
All 0
R/W Description
R
Reserved
These bits are always read as 0.
R/W 8-Bit Counter
Rev. 3.00 Jun. 18, 2008 Page 259 of 1160
REJ09B0191-0300