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SH7206 Datasheet, PDF (1141/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
Section 25 Electrical Characteristics
25.4.6 MTU2, MTU2S Module Timing
Table 25.11 MTU2, MTU2S Module Timing
Conditions: VCC = 1.15 V to 1.35 V, PVCC = AVCC = 3.0 V to 3.6 V, VSS = PVSS = AVSS = 0 V,
Ta = −20°C to +85°C
Item
Symbol Min.
Output compare output delay time
Input capture input setup time
Timer input setup time
Timer clock pulse width (single edge)
Timer clock pulse width (both edges)
Timer clock pulse width
(phase counting mode)
t
TOCD
tTICS
tTCKS
t
TCKWH/L
t
TCKWH/L
t
TCKWH/L

tcyc/2 + 20
tcyc + 20
1.5
2.5
2.5
Note: tpcyc indicates peripheral clock (Pφ) cycle.
Max.
100





Unit
ns
ns
ns
t
pcyc
t
pcyc
t
pcyc
Figure
Figure 25.47
Figure 25.48
CKIO
Output compare
output
Input capture
input
tTOCD
tTICS
Figure 25.47 MTU2, MTU2S Input/Output Timing
CKIO
TCLKA
to TCLKD
tTCKS
tTCKS
tTCKWL
tTCKWH
Figure 25.48 MTU2, MTU2S Clock Input Timing
Rev. 3.00 Jun. 18, 2008 Page 1117 of 1160
REJ09B0191-0300