SH7206 Datasheet, PDF (139/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 5 Interrupt Controller (INTC)
5.3.1 Interrupt Priority Registers 01, 02, 05 to 14 (IPR01, IPR02, IPR05 to IPR14)
IPR01, IPR02, and IPR05 to IPR14 are 16-bit readable/writable registers in which priority levels
from 0 to 15 are set for IRQ interrupts, PINT interrupts, and on-chip peripheral module interrupts.
Table 5.3 shows the correspondence between the interrupt request sources and the bits in IPR01,
IPR02, and IPR05 to IPR14.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Table 5.3 Interrupt Request Sources and IPR01, IPR02, and IPR05 to IPR14
Register Name
Interrupt priority
register 01
Interrupt priority
register 02
Interrupt priority
register 05
Interrupt priority
register 06
Interrupt priority
register 07
Interrupt priority
register 08
Interrupt priority
register 09
Interrupt priority
register 10
Interrupt priority
register 11
Interrupt priority
register 12
Bits 15 to 12
IRQ0
Bits 11 to 8
IRQ1
IRQ4
IRQ5
PINT7 to PINT0 Reserved
DMAC0
DMAC1
DMAC4
DMAC5
CMT0
CMT1
MTU0
MTU0
(TGI0A to TGI0D) (TCI0V, TGI0E,
TGI0F)
MTU2
MTU2
(TGI2A, TGI2B) (TCI2V, TCI2U)
MTU4
MTU4
(TGI4A to TGI4D) (TCI4V)
MTU3S
MTU3S
(TGI3A to TGI3D) (TCI3V)
Bits 7 to 4
IRQ2
Bits 3 to 0
IRQ3
IRQ6
IRQ7
ADI0
ADI1
DMAC2
DMAC3
DMAC6
DMAC7
BSC
WDT
MTU1
MTU1
(TGI1A, TGI1B) (TCI1V, TCI1U)
MTU3
MTU3
(TGI3A to TGI3D) (TCI3V)
MTU5
(TGI5U, TGI5V,
TGI5W)
POE2
(OEI1, OEI2)
MTU4S
MTU4S
(TGI4A to TGI4D) (TCI4V)
Rev. 3.00 Jun. 18, 2008 Page 115 of 1160
REJ09B0191-0300