SH7206 Datasheet, PDF (29/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 1 Overview
Items
Specification
Multi-function timer • Maximum 16 lines of pulse input/output and 3 lines of pulse input
pulse unit 2 (MTU2)
based on six channels of 16-bit timers
• 21 output compare and input capture registers
• Input capture function
• Pulse output modes
Toggle, PWM, complementary PWM, and reset-synchronized PWM
modes
• Synchronization of multiple counters
• Complementary PWM output mode
 Non-overlapping waveforms output for 3-phase inverter control
 Automatic dead time setting
 0% to 100% PWM duty value specifiable
 A/D conversion delaying function
 Interrupt skipping at crest or trough
• Reset-synchronized PWM mode
Three-phase PWM waveforms in positive and negative phases can be
output with a required duty value
• Phase counting mode
Two-phase encoder pulse counting available
Multi-function timer • Subset of MTU2, included in channels 3 to 5
pulse unit 2S (MTU2S) _{• Operating at 100 MHz max.}
Port output enable 2 • High-impedance control of high-current pins at a falling edge or low-
(POE2)
level input on the POE pin
Compare match timer • Two-channel 16-bit counters
(CMT)
• Four types of clock can be selected (Pφ/8, Pφ/32, Pφ/128, and Pφ/512)
• DMA transfer request or interrupt request can be issued when a
compare match occurs
Serial communication • Four channels
interface with FIFO
(SCIF)
• Clocked synchronous or asynchronous mode selectable
• Simultaneous transmission and reception (full-duplex communication)
supported
• Dedicated baud rate generator
• Separate 16-stage FIFO registers for transmission and reception
• Modem control function (in asynchronous mode)
Rev. 3.00 Jun. 18, 2008 Page 5 of 1160
REJ09B0191-0300