SH7206 Datasheet, PDF (279/1188 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series

Section 8 Bus State Controller (BSC)
Initial
Bit
Bit Name Value R/W Description
11
RFSH
0
R/W Refresh Control
Specifies whether or not the refresh operation of the
SDRAM is performed.
0: No refresh
1: Refresh
10
RMODE
0
R/W Refresh Control
Specifies whether to perform auto-refresh or self-
refresh when the RFSH bit is 1. When the RFSH bit is
1 and this bit is 1, self-refresh starts immediately.
When the RFSH bit is 1 and this bit is 0, auto-refresh
starts according to the contents that are set in
registers RTCSR, RTCNT, and RTCOR.
0: Auto-refresh is performed
1: Self-refresh is performed
9
PDOWN
0
R
Power-Down Mode
Specifies whether the SDRAM will enter the power-
down mode after the access to the SDRAM. With this
bit being set to 1, after the SDRAM is accessed, the
CKE signal is driven low and the SDRAM enters the
power-down mode.
0: The SDRAM does not enter the power-down mode
after being accessed.
1: The SDRAM enters the power-down mode after
being accessed.
Rev. 3.00 Jun. 18, 2008 Page 255 of 1160
REJ09B0191-0300